Nanowire nanomemory

nanomemoryThis image depicts a novel design for a nanomemory device that its inventors believe can store 40 gigabits of data per square centimeter. Developed by scientists at the University of Southern California and the NASA Ames Research Center, the self-assembled molecular memory consists of a nanowire coated with a layer of transistors. In traditional computer memory chips, each transistor holds one bit of information. The beauty of this nano-enabled approach is that the transistors can be put in eight distinct states depending on the voltage applied. That means each "memory cell" can hold three bits of data. Link